Chip resistor and method for producing the same

ABSTRACT

A chip resistor includes a resistive element ( 1 ), an insulation layer ( 4 ) formed in a back surface of the flat surface, and two electrodes ( 3 ) spaced from each other via the insulation layer. Each electrode ( 3 ) makes contact with the insulation layer ( 4 ). Each electrode ( 3 ) has a lower surface formed with a solder layer ( 39 ).

TECHNICAL FIELD

The present invention relates to chip resistors and manufacturingmethods therefor.

BACKGROUND ART

An example of conventional chip resistors is disclosed inJP-A2002-57009. FIG. 26 of the present application is a sketch of theresistor disclosed in the gazette (The entire resistor is indicated by areference symbol B). The chip resistor B includes a rectangularresistive element 90 made of metal, and a pair of electrodes 91 formedon a lower surface of the resistive element 90. The two electrodes 91are spaced from each other by a distance s5. Each electrode 91 has asolder layer 92 formed thereon.

The chip resistor B is manufactured by means of a method shown in FIGS.27A-27E. First, two metal plates 94, 95 are prepared (FIG. 27A), and themetal plate 95 is bonded to a lower surface of the metal plate 94 (FIG.27B). The upper metal plate 94 has a relatively larger electricresistance than the lower metal plate 95. The lower metal plate 95 ismade of copper for example, and has a smaller electric resistance. Next,part of the lower metal plate 95 is ground off by machining, to form agap 93 (FIG. 27C). On the remaining portion of the metal plate 95 isformed a solder layer 96 (FIG. 27D). Finally, the metal plate 94 (andthe related members 95, 96) are cut into chip resistors B.

According to the conventional method of manufacture described above, thechip resistor B has its electrodes 91 (FIG. 26) formed by mechanicalgrinding of the lower metal plate 95 (FIGS. 27B, 27C). As will beunderstood easily, in order for the device B to function properly as aresistor, it is not preferable that part of the electrically conductivemetal plate 95 is left between the two electrodes 91. Therefore, thedepth of grinding into the metal plate 95 must be at least the same asthe thickness of the metal plate 95. However, it is not easy in generalto make such an operational setting accurately.

If the grinding depth is greater than the thickness of the metal plate95, the upper metal plate 94 is ground partially, which alters theresistance value. Further, in mechanical grinding, it is difficult toachieve an exact dimension for the distance s5 between the twoelectrodes 91, and therefore a certain level of error is unavoidable.

For these reasons, a trimming operation is performed to the conventionalchip resistor B in order to make adjustment to the resistance value.However, performing the trimming to all of the resistors which aremanufactured leads to increased cost of manufacture.

DISCLOSURE OF THE INVENTION

The present invention was made under the above-described circumstances,and it is therefore an object of the present invention to provide a chipresistor which is easier to manufacture than before, and does not needthe resistance value adjustment. Another object of the present inventionis to provide a method for manufacturing such a chip resistor.

A first aspect of the present invention provides a chip resistor whichincludes: a resistive element having a flat surface; an insulation layerprovided in the flat surface; and a plurality of electrodes provided inthe flat surface. The electrodes make contact with the insulation layerand are spaced from each other via the insulation layer.

Preferably, the insulation layer is formed of a resin material bythick-film printing.

Preferably, the resistive element has another surface facing away fromthe flat surface. This another surface is formed with an electricallyinsulating overcoat layer.

Preferably, the overcoat layer and the insulation layer are of the samematerial.

Preferably, the electrodes have a greater thickness than the insulationlayer.

Preferably, the electrodes are formed with a solder layer thereon.

A second aspect of the present invention provides a method of making achip resistor. This method includes: a step of forming an insulatingpattern on an electrically resistive plate; a step of forming anelectrical conductor in contact with the insulating pattern, on theplate; and a step of dividing the plate into a plurality of chips. Eachof the chips includes at least part of the insulating pattern and atleast part of the conductor.

Preferably, the plate is a flat metal plate which has a uniformthickness. Further, the insulating pattern is formed by thick-filmprinting, and the electrical conductor is formed by plating.

Preferably, the method according to the present invention furtherincludes a step of forming an electrically insulating overcoat layer onthe plate before dividing the plate.

Preferably, the plate is divided by blanking, with a single punch die.

A third aspect of the present invention provides a chip resistor whichincludes: a chip-like resistive element having an upper surface and aback surface facing away from each other in a direction of thickness; aplurality of electrodes provided in the resistive element; and aninsulation layer formed in at least one of the upper surface and theback surface of the resistive element, between the electrodes. Theresistive element includes a plurality of upright surfaces which extendin the direction of thickness. Each of the electrodes is providedcorrespondingly in one of the upright surfaces.

Preferably, the resistive element includes a plurality of recessesformed by the upright surfaces.

Preferably, the recesses are filled by the electrodes.

Preferably, the resistive element includes a plurality of through holesdefined by the upright surfaces.

Preferably, the through holes are filled by the electrodes.

Preferably, the electrodes extend in the direction of thickness, beyondthe insulation layer.

Preferably, each of the electrodes is formed with a solder layer.

A fourth aspect of the present invention provides a method of making achip resistor. This method includes: a step of forming an insulationlayer on an electrically resistive plate; a step of forming a pluralityof through holes in the plate; a step of plating a conductor in each ofthe through holes; and a step of dividing the plate into a plurality ofchips.

Preferably, the through holes are divided in the step of dividing theplate.

Preferably, the through holes are formed by punching.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a perspective view of a chip resistor according to a firstembodiment of the present invention.

FIG. 2 is a sectional view taken in lines F2-F2 in FIG. 1.

FIG. 3 is an enlarged view of a portion of the chip resistor in FIG. 2.

FIGS. 4A through FIG. 6 illustrate a method of manufacturing the chipresistor according to the first embodiment of the present invention.

FIG. 7A and FIG. 7B show a chip resistor according to a secondembodiment of the present invention.

FIG. 7C shows a plate used for manufacturing the chip resistor accordingto the second embodiment of the present invention.

FIG. 8A and FIG. 8B show a chip resistor according to a third embodimentof the present invention.

FIG. 8C shows a plate used for manufacturing the chip resistor accordingto the third embodiment of the present invention.

FIGS. 9A-9B show a chip resistor according to the present invention,which has four electrodes.

FIG. 9C shows a plate used for manufacturing the chip resistor in FIGS.9A-9B.

FIGS. 10A-10B show another chip resistor according to the presentinvention, which has four electrodes.

FIG. 10C shows a plate used for manufacturing the chip resistor in FIGS.10A-10B.

FIGS. 11A-11B show another chip resistor according to the presentinvention, which has four electrodes.

FIG. 11C shows a plate used for manufacturing the chip resistor in FIGS.11A-11B.

FIG. 12 through FIG. 16B show a chip resistor according to a fourthembodiment of the present invention.

FIG. 17A through FIG. 18 illustrate a method of manufacturing the chipresistor in FIG. 12.

FIGS. 19A through FIG. 25E illustrate variations of the presentinvention.

FIG. 26 is a perspective view of a conventional chip resistor.

FIGS. 27A-27E illustrates a method of manufacturing the conventionalchip resistor.

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, preferred embodiments of the present invention will bedescribed with reference to the drawings.

FIG. 1 through FIG. 3 show a chip resistor A according to a firstembodiment of the present invention. As shown in FIG. 1 and FIG. 2, thechip resistor A includes a resistive element 1, an overcoat layer 2, apair of electrodes 3, and an insulating spacer 4.

The resistive element 1 is a rectangular metal chip. As will beunderstood from FIG. 2, the resistive element 1 has a uniform thickness.The resistive element 1 is made of e.g. a Cu—Mn alloy, a Ni—Cu alloy anda Ni—Cr alloy. Alternatively, the resistive element 1 can be formed of anonmetal material.

The overcoat layer 2 is electrically insulating, and covers an uppersurface 10 a of the resistive element 1. The overcoat layer 2 can beformed of epoxy resin by thick-film printing.

The pair of electrodes 3 are on a back surface 10 b of the resistiveelement 1, and are spaced from each other by a predetermined distances1. The electrodes 3 can be formed by plating copper on the resistiveelement 1. Each electrode 3 has a lower surface formed with a solderlayer 39.

The spacer 4 is provided between the two electrodes 3. As shown in FIG.2, the spacer 4 has two end faces 40 which are facing away from eachother and spaced by the distance s1. Each end face 40 makes tightcontact with one of the electrode 3. The spacer 4 can be formed of thesame electrically insulating material and by the same method as used forthe overcoat layer 2.

In FIG. 2, the solder layer 39 is illustrated as completely separatedfrom the spacer 4 for the sake of simplicity. Actually however, thesolder layer 39 extends to touch a lower surface of the spacer 4 asshown in FIG. 3 (See reference code n1). As mentioned earlier, thespacer 4 is electrically insulating. Therefore, the contact between thesolder layer 39 and the spacer 4 does not does not alter the desiredresistance value between the two electrodes 3.

As shown in FIG. 2, a thickness t1 of each electrode 3 is made greaterthan a thickness t2 of the spacer 4. Therefore, a total thickness t3 ofthe electrode 3 and the solder layer 39 is also greater than thethickness t2 of the spacer 4. Specifically, the thickness t1 is 30 μmapprox, the thickness t2 is 20 μm approx, and the thickness t3 is 35 μmapprox. (i.e. the thickness of the solder layer 39 is 5 μm approx.)

The overcoat layer 2 has the same thickness as the spacer 4 or 20 μmapprox. The resistive element 1 has a thickness in a range of 0.1 mmthrough 1 mm approx, and a length and a width each falling somewhere ina range of 2 mm through 7 mm. The chip resistor A has a resistance valuein a range of 0.5 Ω through 50 mΩ approx.

Next, description will be made for how the chip resistor A can bemanufactured, with reference to FIG. 4A through FIG. 4E and FIG. 5.

First, as shown in FIG. 4A, a metal plate 1A which has a uniformthickness is prepared. The plate 1A has an appropriate size in order toyield a plurality of rectangular resistive elements (each of whichcorresponds to the resistive element 1). The plate 1A has a flat uppersurface 10 a and a flat back surface (indicated by a reference code 10 bin FIG. 4C).

As shown in FIG. 4B, a coat layer 2A is formed on the upper surface 10 aof the plate 1A. The coat layer 2A can be formed of a resin bythick-film printing. The formed coat layer 2A may receive apredetermined marking operation.

As shown in FIG. 4C, a plurality of parallel partitions 4A are formed onthe back surface 10 b of the plate 1A. These partitions 4A can be formedby thick-film printing, using the same resin material as used for theformation of the coat layer 2A. The thick-film printing enables to formeach partition 4A accurately to a desired size, and further, to disposeeach partition 4A accurately at a desired position.

As shown in FIG. 4D, electrically conductive layer 3A is formed in eachregion between the partitions 4A. Then, a solder layer 39A is formed oneach electrically conductive layer 3A. The electrically conductive layer3A is formed by copper plating for example. The plating method enablesto prevent formation of a gap between the formed electrically conductivelayer 3A and the partition 4A. Formation of the solder layer 39 is alsomade by plating.

Finally, as shown in FIG. 4E, a blanking operation is made to the plate1A, whereby a plurality of units (the chip resistors A) are obtained. Inthis case, it is preferable that one punch die should be used repeatedlyso that products will be identical with each other. The rectangularregions which are to be punched out are indicated bylong-dashed-short-dashed lines in FIG. 5. One punch-out region is spacedfrom the adjacent ones by a small, predetermined distance s2.

The chip resistor A manufactured by the method described above ismounted on e.g. a printed circuit board, by means of solder re-flowsurface-mounting method. As has been described above, the solder layer39 and the electrodes 3 protrude downwardly beyond the lower surface ofthe spacer 4 (See FIG. 2 or FIG. 3). Therefore, it is possible toappropriately mount the resistor A. Further, the resistive element 1 hasits upper surface 10 a coated with the overcoat layer 2. This enables toprevent the resistive element 1 from being electrically conductedunexpectedly with other conductive members.

According to the above method, the electrically conductive layer 3A(which corresponds to the electrodes 3) is formed after the formation ofthe partition 4A (which corresponds to the spacer 4) (See FIGS. 4C and4D). The space between mutually adjacent partitions 4A (whichcorresponds to s1 in FIG. 2) can be set accurately by the resinthick-film printing. As a result, in each of the final products or thechip resistor A, the electrodes 3 are spaced accurately by apredetermined distance. Further, there is no chance that the plate 1A(resistive element 1) is partially ground mechanically, in the formationof the electrode 3. Thus, the chip resistor A according to the presentinvention needs no trimming operation which is necessary in theconventional art for the purpose of resistance value adjustment.

According to the embodiment described above, division into individualresistors is achieved by blanking the plate 1A; however, the presentinvention is not limited by this. For example, shearing machines androtary cutters may be used to divide the plate 1A. In this case, theplate 1A is divided along cutting lines L1 and L2 in FIG. 6.

FIGS. 7A through 7C illustrate a second embodiment of the presentinvention. In these figures, members which are identical with or similarto those used in the first embodiment are indicated by the samereference codes.

A chip resistor Aa (FIGS. 7A and 7B) according to the second embodimentbasically has the same construction as the resistor A (See FIG. 2)according to the first embodiment, differing however in disposition ofthe spacer (and therefore disposition of a pair of electrodes 3).Specifically, as shown in FIGS. 7A and 7B, a resistive element 1 has aback surface provided with three spacers 4 a-4 c which are spaced fromeach other. Between the spacers 4 a, 4 b is one electrode 3 whereasbetween the spacers 4 a, 4 c is another electrode 3. Each electrode 3 isformed with a solder layer 39.

When manufacturing the chip resistor Aa, a plate 1A shown in FIG. 7C isused. The plate 1A is formed with a plurality of parallel partitions 4A,and between the partitions 4A are formed an electrically conductivelayer 3A and a solder layer 39A (as in the first embodiment, thepartitions 4A are formed first and thereafter the electricallyconductive layer 3A and the solder layer 39A are formed). The plate 1Ais cut along the long-dashed-short-dashed lines in the figure, and thusdivided into a plurality of individual chips. In place of such a cuttingprocess, a blanking process to the plate 1A may take place.

FIGS. 8A through 8C illustrate a third embodiment of the presentinvention. As shown in FIG. 8B, a chip resistor Ab according to thethird embodiment is formed with a cross-shaped spacer 4, andcorresponding to this, the resistor Ab has four electrodes 3. Eachelectrode 3 is formed with a solder layer 39.

The chip resistor Ab is obtained by cutting a plate 1A shown in FIG. 8Calong long-dashed-short-dashed lines. The plate 1A is formed withmesh-like partitions 4A, an electrically conductive layer 3A and asolder layer 39A.

The chip resistor Ab may be used, for example, for measurement of anelectric current flowing in a given electric circuit. Specifically, byusing two of the four electrodes 3, the chip Resistor Ab is connected inseries with a target electric circuit. The other two electrodes 3 areconnected with a voltmeter. The resistance value of the chip resistor Abis known. Therefore, based on the voltage given by the voltmeter, thevalue of the current which flows in the circuit can be calculated (Ohm'slaw).

FIGS. 9A-9C, 10A-10C and 11A-11C show other embodiments of the chipresistor which has four electrodes. As will be understood from FIG. 9B,FIG. 10B and FIG. 11B, two electrodes 3 a make a pair, and the other twoelectrodes 3 b make another pair. The electrodes 3 a are spaced by adistance s3, and the electrodes 3 b are spaced by a distance s4. In theresistor in FIG. 9B, the distance s3 is greater than the distance s4. Inthe resistor in FIG. 10B, the distance s3 is smaller than the distances4. In the resistor in FIG. 11B, the distance s3 is equal to thedistance s4. FIGS. 9C, 10C and 11C show plates 1A used in themanufacture of these three types of the resister respectively. Areference code 4A indicates resin partitions. The plates 1A are cutalong predetermined cutting lines (indicated by long-dashed-short-dashedlines).

FIG. 12 through FIG. 14 show a chip resistor according to a fourthembodiment of the present invention (the entire resistor is indicated bya reference code Ac). As understood from FIG. 12 and FIG. 13, the chipresistor Ac includes a resistive element 1′, insulation layers 2′ (2 a′,2 b′) and a pair of electrodes 3′.

The resistive element 1′ has a uniform thickness, and is made of a metalmaterial such as a Cu—Mn alloy, a Ni—Cu alloy and a Ni—Cr alloy.Alternatively, the resistive element 1′ may be non-metal. As shown inFIG. 12, the resistive element 1′ is formed with two recesses 11′ whichare spaced from each other by a distance s1′.

The insulation layer 2‘covers an upper surface 10 a’ or a back surface10 b′ of the resistive element 1′. The insulation layer 2′ is made ofepoxy resin for example.

The electrode 3′ is formed on a plurality of surfaces 11A′ of the recess11′ in the resistive element 1′. Therefore, a distance (a minimumdistance) between the two electrodes 3′ is equal to a distance s1′between the two recesses 11′ (or more precisely a distance between twosurfaces 11 a″ that are closest to the center of the resistive element11, of the surfaces 11 a′ which form the recesses 11′). The distance s1′is varied in accordance with a target value of resistance. The sameapplies to the thickness and width of the resistive element 1′. In thechip resistor Ac, the resistance value between the two electrodes 3′lies between 1 mΩ through 100 mΩ for example.

Each electrode 3′ has a solder layer 39′ formed thereon. Each electrode3, has its upper and lower edges flush with an outside surface of therespective insulation layers 2 a′, 2 b′ (See FIG. 13); however, thepresent invention is not limited by this. For example, as shown in FIG.15, each electrode 3′ may have its upper edge extending beyond theoutside surface of the insulation layer 2 a′ as well as its lower edgeof the electrode extending beyond the outside surface of the insulationlayer 2 b′. In this figure, the amount of upper and lower extension ofthe electrodes 3′ is indicated by a reference code s3′. Such aconstruction can be achieved by forming the electrodes 3′ throughplating. Specifically, as shown in FIG. 16A, while the electrode 3′ hasa relatively small thickness, the electrode 3′ forms only on a sidesurface 11A′ of the resistive element 1′. During the plating process, asthe film thickness of the electrode 3′ grows, the electrode 3′ grows indirections indicated by Arrows N1. As a result, as shown in FIG. 16B,the electrode 3′ grows in an upward or downward direction, beyond theinsulation layers 2A′ or 2B′. The solder layer 39′ can also be formed byplating, as is the electrode 3′.

Next, a method of manufacturing the chip resistor Ac will be describedwith reference to FIG. 17A through FIG. 17E.

First, as shown in FIG. 17A, a metal plate 1A′ which has a uniformthickness is prepared. The plate 1A′ is large enough in order to yield aplurality of resistive elements 1′. As shown in FIG. 17B, an insulationlayer 2A′ is formed on each of an upper surface 10 a′ and a back surface10 b′ of the plate 1A′. The insulation layer 2A′ can be formed byapplying a resin material onto the upper surface 10 a′ and the backsurface 10 b′ (using a spin coating method for example).

Next, as shown in FIG. 17C, a plurality of rectangular through holes11A′ are formed in the plate 11A′ and insulation layers 2A′. Thesethrough holes 11A′ can be formed by punching in a matrix pattern so theyline up in predetermined space from each other. In the right and leftdirections as of the figure, a distance between two mutually adjacentthrough holes 11A′ in the matrix is identical with anelectrode-to-electrode distance s1′ (See FIG. 12) described above.

As shown in FIG. 17D, an electrically conductive layer 3A′ is formed inan inner wall surface of each through hole 11A′, by means of copperplating for example. Then, on each electrically conductive layer 3A′, asolder layer (not illustrated) is formed by plating.

After the plating process, as shown in FIG. 17E, blanking is maderepeatedly to the plate 1A′, whereby a plurality of chips (resistiveelements 1) are obtained from the plate 1A′. In this blanking, a singlepunch die (not illustrated) is used so that products will be of anidentical size with each other. In the figure, punch-out regions areindicated by long-dashed-short-dashed lines.

The chip resistor Ac is mounted on a desired object (e.g. a printedcircuit board) by means of a solder re-flow method for example. As hasbeen described above, lower edges of the solder layer 39′ and theelectrode 3′ are flush with or protrude downwardly beyond the lowersurface of the spacer 4. Further, the electrodes 3′ are formed on aplurality of surfaces 11A′, so the lower end surface of the electrodes3′ has a greater area than in a case where e.g. only one of the surfaces11A′ is formed with the electrode 3′. Therefore, it is possible toappropriately solder the resistor Ac onto the printed circuit board.

The upper surface 10 a′ and the back surface 10 b′ of the resistiveelement 1′ is covered by the insulation layers 2′. Thus, the resistiveelement 1′ is prevented from unwanted electrical contact with othermembers or components.

According to the method of manufacturing the chip resistor Ac describedabove, it is possible to form the electrodes 3′ without inappropriatelyaltering the resistance value of the resistive element 1′. Therefore,resistor Ac does not need any trimming operation for resistance valueadjustment, and it becomes possible to reduce manufacturing costaccordingly.

According to the manufacturing method described above, division of theplate 1A′ is achieved by blanking the plate 1A. Alternatively however,shearing machines and rotary cutters may be used to divide the plate 1Aalong cutting lines L1′ and L2′ in FIG. 18.

The shape of the recess 11′ in the resistive element 1′ (See FIG. 12)may not necessarily be rectangular. For example, as shown in FIG. 19A,each recess 11′ may have a semicircular wall surface. In this case, aplate 11A′ shown in FIG. 19B is cut along cutting lines(long-dashed-short-dashed lines). A reference code 11A′ indicates athrough hole formed in the plate 1A′. Each through hole 11A′ has twosemicircular wall surfaces separated from each other. A reference code3A′ indicates an electrically conductive layer formed in the throughhole 11A′.

A resistor shown in FIGS. 20A and 20B is essentially the same as thechip resistor Ac (FIGS. 12 and 13), differing only in that the recesses11′ are replaced by rectangular through holes 12′ formed in theresistive element 1′. Each through hole 12′ has an inner wall surface 12a′ formed with an electrode 3′. Such a chip resistor is obtained bycutting a plate 1A′ which is shown in FIG. 20C, alonglong-dashed-short-dashed lines.

A chip resistor shown in FIG. 21A includes a resistive element 1′ whichis formed with four recesses 11′. Each recess 11′ is formed with anelectrode 3′. Such a chip resistor is obtained by cutting a plate 1A′shown in FIG. 21B, along long-dashed-short-dashed lines. A referencecode 11A′ indicates a through hole which has a rectangular section. Eachthrough hole 11A′ is formed with an electrically conductive layer 3A′. Aresistor in FIG. 21A has four electrodes, and so can be used formeasurement of an electric current in an electric circuit, as is thechip resistor Ab (See FIGS. 8A and 8B).

A chip resistor shown in FIG. 22A is rectangular, in which each of thefour corner regions is made into an arc-shaped electrode 3′. Such a chipresistor is obtained by cutting a plate shown in FIG. 22B alonglong-dashed-short-dashed lines. A reference code 11A′ indicates athrough hole which has a round section.

Chip resistors shown in FIGS. 23A-23D correspond to the chip resistorsin FIGS. 12, 20A, 21A and 22A respectively. In the resistors shown inFIGS. 23A-23C, each electrode 3′ fills up a recess 11′ or a through hole12′ in a resistive element 1′. In a resistor shown in FIG. 23D, anelectrodes 3′ provided at each corner region 13′ integrates with theresistive element 1′, to make a complete rectangle.

Constructions shown in FIGS. 23A-23D can be achieved by increasing thethickness of a metal coating which is formed in the plating process.According to the above construction, it is possible to give theelectrode 3′ a large bonding area. As a result, it becomes possible toincrease the strength of solder bonding to the electrode 3′, reduceelectric resistance of the electrode 3′ itself, and so on.

Chip resistors shown in FIGS. 24A and 24B are similar to the one in FIG.19A in its basic construction, differing however in that a resistiveelement 1′ has a pair of side edges provided with a pair of cutouts 14′.The cutouts 14′ are for resistance value adjustment of the resistiveelement 1′. As shown in FIG. 24B, each cutout 14′ is filled with a resinmember 20′. The resin member is made of the same resin as the insulationlayers 2′.

The resistors in FIGS. 24A and 24B can be manufactured as follows:First, as shown in FIG. 25A, through holes 14A′ are punched out in aplate 1A′. Next, as shown in FIG. 25B, a resin is applied on an upperand a lower surfaces of the plate 1A′ to form insulation layers 2′. Inthis step, the resin is filled into each through hole 14A′. Then, asshown in FIG. 25C and FIG. 25D, through holes 11A′ are formed in theplate 1A′, and an electrically conductive layer 3A′ is formed in each ofthe through holes 11A′. Finally, as shown in FIG. 25E, the plate 1A′ iscut along cutting lines (long-dashed-short-dashed lines).

The present invention having been described thus far, it is obvious thatthe invention can be varied in many ways. Such variations should not beconsidered as deviations from the spirit and scope of the presentinvention, and all of these changes obvious to those skilled in the artshould be included in the scope of the following claims.

1. A chip resistor comprising: a resistive element including a flatsurface; an insulation layer provided in the flat surface; and aplurality of electrodes provided in the flat surface; wherein theelectrodes make contact with the insulation layer and are spaced fromeach other via the insulation layer.
 2. The chip resistor according toclaim 1, wherein the insulation layer is formed of a resin material bythick-film printing.
 3. The chip resistor according to claim 1, whereinthe resistive element has another surface facing away from the flatsurface, said another surface being formed with an electricallyinsulating overcoat layer.
 4. The chip resistor according to claim 3,wherein the overcoat layer and the insulation layer are of the samematerial.
 5. The chip resistor according to claim 1, wherein theelectrodes have a greater thickness than the insulation layer.
 6. Thechip resistor according to claim 1, wherein the electrodes are formedwith a solder layer thereon.
 7. A method of making a chip resistor,comprising: a step of forming an insulating pattern on an electricallyresistive plate; a step of forming an electrical conductor in contactwith the insulating pattern, on the plate; and a step of dividing theplate into a plurality of chips, wherein each of the chips includes atleast part of the insulating pattern and at least part of the conductor.8. The method according to claim 7, wherein the plate is a flat metalplate having a uniform thickness, the insulating pattern being formed bythick-film printing, the electrical conductor being formed by plating.9. The method according to claim 7, further comprising a step of formingan electrically insulating overcoat layer on the plate before dividingthe plate.
 10. The method according to claim 7, wherein the plate isdivided by blanking with a single punch die.
 11. A chip resistorcomprising: a chip-like resistive element including an upper surface anda back surface facing away from each other in a direction of thickness;a plurality of electrodes provided in the resistive element; and aninsulation layer formed in at least one of the upper surface and theback surface of the resistive element, between the electrodes; whereinthe resistive element includes a plurality of upright surfaces extendingin the direction of thickness, each of the electrodes being providedcorrespondingly in one of the upright surfaces.
 12. The resistoraccording to claim 11, wherein the resistive element includes aplurality of recesses formed by the upright surfaces.
 13. The resistoraccording to claim 12, wherein the recesses are filled by theelectrodes.
 14. The resistor according to claim 11, wherein theresistive element includes a plurality of through holes defined by theupright surfaces.
 15. The resistor according to claim 14, wherein thethrough holes are filled by the electrodes.
 16. The resistor accordingto claim 11, wherein the electrodes extend in the direction ofthickness, beyond the insulation layer.
 17. The resistor according toclaim 11, wherein each of the electrodes is formed with a solder layer.18. A method of making a chip resistor, comprising: a step of forming aninsulation layer on an electrically resistive plate; a step of forming aplurality of through holes in the plate; a step of plating a conductorin each of the through holes; and a step of dividing the plate into aplurality of chips.
 19. The method according to claim 18, wherein thethrough holes are divided in the step of dividing the plate.
 20. Themethod according to claim 18, wherein the through holes are formed bypunching.